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Searched refs:mmDP1_DP_SEC_CNTL1 (Results 1 – 14 of 14) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3203 #define mmDP1_DP_SEC_CNTL1 0x1FAB macro
H A Ddce_8_0_d.h4013 #define mmDP1_DP_SEC_CNTL1 0x1fab macro
H A Ddce_10_0_d.h4645 #define mmDP1_DP_SEC_CNTL1 0x4bc4 macro
H A Ddce_11_0_d.h4678 #define mmDP1_DP_SEC_CNTL1 0x4bc4 macro
H A Ddce_11_2_d.h5910 #define mmDP1_DP_SEC_CNTL1 0x4bc4 macro
H A Ddce_12_0_offset.h10544 #define mmDP1_DP_SEC_CNTL1 … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5844 #define mmDP1_DP_SEC_CNTL1 … macro
H A Ddcn_3_0_3_offset.h5353 #define mmDP1_DP_SEC_CNTL1 … macro
H A Ddcn_3_0_1_offset.h8320 #define mmDP1_DP_SEC_CNTL1 … macro
H A Ddcn_1_0_offset.h8719 #define mmDP1_DP_SEC_CNTL1 … macro
H A Ddcn_2_1_0_offset.h10243 #define mmDP1_DP_SEC_CNTL1 … macro
H A Ddcn_3_0_2_offset.h9935 #define mmDP1_DP_SEC_CNTL1 … macro
H A Ddcn_2_0_0_offset.h11334 #define mmDP1_DP_SEC_CNTL1 … macro
H A Ddcn_3_0_0_offset.h11071 #define mmDP1_DP_SEC_CNTL1 … macro