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Searched refs:mmDP2_DP_DPHY_8B10B_CNTL (Results 1 – 12 of 12) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3220 #define mmDP2_DP_DPHY_8B10B_CNTL 0x42D3 macro
H A Ddce_8_0_d.h3910 #define mmDP2_DP_DPHY_8B10B_CNTL 0x42d3 macro
H A Ddce_10_0_d.h4542 #define mmDP2_DP_DPHY_8B10B_CNTL 0x4cb4 macro
H A Ddce_11_0_d.h4530 #define mmDP2_DP_DPHY_8B10B_CNTL 0x4cb4 macro
H A Ddce_11_2_d.h5762 #define mmDP2_DP_DPHY_8B10B_CNTL 0x4cb4 macro
H A Ddce_12_0_offset.h10802 #define mmDP2_DP_DPHY_8B10B_CNTL … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_offset.h8638 #define mmDP2_DP_DPHY_8B10B_CNTL … macro
H A Ddcn_1_0_offset.h9007 #define mmDP2_DP_DPHY_8B10B_CNTL … macro
H A Ddcn_2_1_0_offset.h10551 #define mmDP2_DP_DPHY_8B10B_CNTL … macro
H A Ddcn_3_0_2_offset.h10256 #define mmDP2_DP_DPHY_8B10B_CNTL … macro
H A Ddcn_2_0_0_offset.h11640 #define mmDP2_DP_DPHY_8B10B_CNTL … macro
H A Ddcn_3_0_0_offset.h11392 #define mmDP2_DP_DPHY_8B10B_CNTL … macro