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Searched refs:mmDP_AUX1_AUX_SW_STATUS (Results 1 – 14 of 14) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3458 #define mmDP_AUX1_AUX_SW_STATUS 0x1898 macro
H A Ddce_8_0_d.h4209 #define mmDP_AUX1_AUX_SW_STATUS 0x1898 macro
H A Ddce_10_0_d.h4857 #define mmDP_AUX1_AUX_SW_STATUS 0x5c20 macro
H A Ddce_11_0_d.h4936 #define mmDP_AUX1_AUX_SW_STATUS 0x5c20 macro
H A Ddce_11_2_d.h6198 #define mmDP_AUX1_AUX_SW_STATUS 0x5c20 macro
H A Ddce_12_0_offset.h9846 #define mmDP_AUX1_AUX_SW_STATUS … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5262 #define mmDP_AUX1_AUX_SW_STATUS … macro
H A Ddcn_3_0_3_offset.h4731 #define mmDP_AUX1_AUX_SW_STATUS … macro
H A Ddcn_3_0_1_offset.h7620 #define mmDP_AUX1_AUX_SW_STATUS … macro
H A Ddcn_1_0_offset.h7961 #define mmDP_AUX1_AUX_SW_STATUS … macro
H A Ddcn_2_1_0_offset.h9511 #define mmDP_AUX1_AUX_SW_STATUS … macro
H A Ddcn_3_0_2_offset.h9187 #define mmDP_AUX1_AUX_SW_STATUS … macro
H A Ddcn_2_0_0_offset.h10564 #define mmDP_AUX1_AUX_SW_STATUS … macro
H A Ddcn_3_0_0_offset.h10281 #define mmDP_AUX1_AUX_SW_STATUS … macro