Home
last modified time | relevance | path

Searched refs:mmSDMA1_GFX_IB_CNTL (Results 1 – 12 of 12) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dmxgpu_vi.c112 mmSDMA1_GFX_IB_CNTL, 0x800f0111, 0x00000100,
252 mmSDMA1_GFX_IB_CNTL, 0x800f0111, 0x00000100,
H A Dsdma_v3_0.c89 mmSDMA1_GFX_IB_CNTL, 0x800f0111, 0x00000100,
107 mmSDMA1_GFX_IB_CNTL, 0x800f0111, 0x00000100,
127 mmSDMA1_GFX_IB_CNTL, 0x800f0111, 0x00000100,
141 mmSDMA1_GFX_IB_CNTL, 0x800f0111, 0x00000100,
156 mmSDMA1_GFX_IB_CNTL, 0x00000100, 0x00000100,
H A Dsdma_v4_0.c104 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_GFX_IB_CNTL, 0x800f0100, 0x00000100),
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/oss/
H A Doss_2_4_d.h306 #define mmSDMA1_GFX_IB_CNTL 0x368a macro
H A Doss_3_0_1_d.h395 #define mmSDMA1_GFX_IB_CNTL 0x368a macro
H A Doss_3_0_d.h499 #define mmSDMA1_GFX_IB_CNTL 0x368a macro
H A Doss_2_0_d.h347 #define mmSDMA1_GFX_IB_CNTL 0x368a macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_offset.h220 #define mmSDMA1_GFX_IB_CNTL 0x008a macro
H A Dsdma1_4_2_2_offset.h220 #define mmSDMA1_GFX_IB_CNTL … macro
H A Dsdma1_4_2_offset.h216 #define mmSDMA1_GFX_IB_CNTL … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h1221 #define mmSDMA1_GFX_IB_CNTL … macro
H A Dgc_10_3_0_offset.h1252 #define mmSDMA1_GFX_IB_CNTL … macro