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Searched refs:mmSDMA1_UTCL1_TIMEOUT (Results 1 – 6 of 6) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_offset.h148 #define mmSDMA1_UTCL1_TIMEOUT 0x0047 macro
H A Dsdma1_4_2_2_offset.h148 #define mmSDMA1_UTCL1_TIMEOUT … macro
H A Dsdma1_4_2_offset.h148 #define mmSDMA1_UTCL1_TIMEOUT … macro
/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dsdma_v4_0.c124 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_UTCL1_TIMEOUT, 0xffffffff, 0x00010001),
134 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_UTCL1_TIMEOUT, 0xffffffff, 0x00010001),
213 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_UTCL1_TIMEOUT, 0xffffffff, 0x00010001),
237 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_UTCL1_TIMEOUT, 0xffffffff, 0x00010001),
270 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_UTCL1_TIMEOUT, 0xffffffff, 0x00010001),
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h1130 #define mmSDMA1_UTCL1_TIMEOUT … macro
H A Dgc_10_3_0_offset.h1172 #define mmSDMA1_UTCL1_TIMEOUT … macro