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Searched refs:mmSDMA1_UTCL1_WATERMK (Results 1 – 6 of 6) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_offset.h128 #define mmSDMA1_UTCL1_WATERMK 0x003d macro
H A Dsdma1_4_2_2_offset.h128 #define mmSDMA1_UTCL1_WATERMK … macro
H A Dsdma1_4_2_offset.h128 #define mmSDMA1_UTCL1_WATERMK … macro
/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dsdma_v4_0.c114 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_UTCL1_WATERMK, 0xfc000000, 0x00000000)
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h1110 #define mmSDMA1_UTCL1_WATERMK … macro
H A Dgc_10_3_0_offset.h1152 #define mmSDMA1_UTCL1_WATERMK … macro