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Searched refs:mmUNIPHYA_LINK_CNTL (Results 1 – 12 of 12) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5928 #define mmUNIPHYA_LINK_CNTL … macro
H A Ddcn_3_0_3_offset.h5459 #define mmUNIPHYA_LINK_CNTL … macro
H A Ddcn_3_0_1_offset.h9106 #define mmUNIPHYA_LINK_CNTL … macro
H A Ddcn_1_0_offset.h10359 #define mmUNIPHYA_LINK_CNTL … macro
H A Ddcn_2_1_0_offset.h11327 #define mmUNIPHYA_LINK_CNTL … macro
H A Ddcn_3_0_2_offset.h11407 #define mmUNIPHYA_LINK_CNTL … macro
H A Ddcn_2_0_0_offset.h12740 #define mmUNIPHYA_LINK_CNTL … macro
H A Ddcn_3_0_0_offset.h12551 #define mmUNIPHYA_LINK_CNTL … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_d.h1536 #define mmUNIPHYA_LINK_CNTL 0x4805 macro
H A Ddce_11_0_d.h1357 #define mmUNIPHYA_LINK_CNTL 0x4805 macro
H A Ddce_11_2_d.h1437 #define mmUNIPHYA_LINK_CNTL 0x4805 macro
H A Ddce_12_0_offset.h1814 #define mmUNIPHYA_LINK_CNTL … macro