| /openbsd/sys/dev/pci/drm/amd/pm/swsmu/ |
| H A D | smu_cmn.h | 121 enum pp_mp1_state mp1_state);
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| H A D | smu_cmn.c | 1019 enum pp_mp1_state mp1_state) in smu_cmn_set_mp1_state() argument
1024 switch (mp1_state) { in smu_cmn_set_mp1_state()
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| H A D | amdgpu_smu.c | 72 static int smu_set_mp1_state(void *handle, enum pp_mp1_state mp1_state);
2100 enum pp_mp1_state mp1_state) in smu_set_mp1_state() argument
2110 ret = smu->ppt_funcs->set_mp1_state(smu, mp1_state); in smu_set_mp1_state()
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| /openbsd/sys/dev/pci/drm/amd/amdgpu/ |
| H A D | amdgpu_drv.c | 2308 adev->mp1_state = PP_MP1_STATE_UNLOAD; in amdgpu_pci_shutdown()
2310 adev->mp1_state = PP_MP1_STATE_NONE; in amdgpu_pci_shutdown()
2607 adev->mp1_state = PP_MP1_STATE_UNLOAD; in amdgpu_pmops_runtime_suspend()
2616 adev->mp1_state = PP_MP1_STATE_NONE; in amdgpu_pmops_runtime_suspend()
2621 adev->mp1_state = PP_MP1_STATE_NONE; in amdgpu_pmops_runtime_suspend()
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| H A D | amdgpu_device.c | 3039 r = amdgpu_dpm_set_mp1_state(adev, adev->mp1_state); in amdgpu_device_ip_suspend_phase2()
3042 adev->mp1_state, r); in amdgpu_device_ip_suspend_phase2()
5191 adev->mp1_state = PP_MP1_STATE_SHUTDOWN; in amdgpu_device_set_mp1_state()
5194 adev->mp1_state = PP_MP1_STATE_RESET; in amdgpu_device_set_mp1_state()
5197 adev->mp1_state = PP_MP1_STATE_NONE; in amdgpu_device_set_mp1_state()
5207 adev->mp1_state = PP_MP1_STATE_NONE; in amdgpu_device_unset_mp1_state()
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| H A D | amdgpu.h | 1046 enum pp_mp1_state mp1_state; member
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| /openbsd/sys/dev/pci/drm/amd/pm/inc/ |
| H A D | amdgpu_dpm.h | 402 enum pp_mp1_state mp1_state);
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| /openbsd/sys/dev/pci/drm/amd/pm/swsmu/smu13/ |
| H A D | aldebaran_ppt.c | 2013 enum pp_mp1_state mp1_state) in aldebaran_set_mp1_state() argument
2015 switch (mp1_state) { in aldebaran_set_mp1_state()
2017 return smu_cmn_set_mp1_state(smu, mp1_state); in aldebaran_set_mp1_state()
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| H A D | smu_v13_0_7_ppt.c | 2122 enum pp_mp1_state mp1_state) in smu_v13_0_7_set_mp1_state() argument
2126 switch (mp1_state) { in smu_v13_0_7_set_mp1_state()
2128 ret = smu_cmn_set_mp1_state(smu, mp1_state); in smu_v13_0_7_set_mp1_state()
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| H A D | smu_v13_0_0_ppt.c | 2382 enum pp_mp1_state mp1_state) in smu_v13_0_0_set_mp1_state() argument
2386 switch (mp1_state) { in smu_v13_0_0_set_mp1_state()
2388 ret = smu_cmn_set_mp1_state(smu, mp1_state); in smu_v13_0_0_set_mp1_state()
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| /openbsd/sys/dev/pci/drm/amd/pm/powerplay/ |
| H A D | amd_powerplay.c | 910 static int pp_dpm_set_mp1_state(void *handle, enum pp_mp1_state mp1_state) in pp_dpm_set_mp1_state() argument
921 return hwmgr->hwmgr_func->set_mp1_state(hwmgr, mp1_state); in pp_dpm_set_mp1_state()
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| /openbsd/sys/dev/pci/drm/amd/include/ |
| H A D | kgd_pp_interface.h | 368 int (*set_mp1_state)(void *handle, enum pp_mp1_state mp1_state);
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| /openbsd/sys/dev/pci/drm/amd/pm/ |
| H A D | amdgpu_dpm.c | 165 enum pp_mp1_state mp1_state) in amdgpu_dpm_set_mp1_state() argument
175 mp1_state); in amdgpu_dpm_set_mp1_state()
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| /openbsd/sys/dev/pci/drm/amd/pm/swsmu/inc/ |
| H A D | amdgpu_smu.h | 922 enum pp_mp1_state mp1_state);
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| /openbsd/sys/dev/pci/drm/amd/pm/powerplay/inc/ |
| H A D | hwmgr.h | 359 int (*set_mp1_state)(struct pp_hwmgr *hwmgr, enum pp_mp1_state mp1_state);
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| /openbsd/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ |
| H A D | vega12_hwmgr.c | 2832 enum pp_mp1_state mp1_state) in vega12_set_mp1_state() argument
2837 switch (mp1_state) { in vega12_set_mp1_state()
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| H A D | vega20_hwmgr.c | 3170 enum pp_mp1_state mp1_state) in vega20_set_mp1_state() argument
3175 switch (mp1_state) { in vega20_set_mp1_state()
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| H A D | vega10_hwmgr.c | 5601 enum pp_mp1_state mp1_state) in vega10_set_mp1_state() argument
5606 switch (mp1_state) { in vega10_set_mp1_state()
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| /openbsd/sys/dev/pci/drm/amd/pm/swsmu/smu11/ |
| H A D | sienna_cichlid_ppt.c | 4210 enum pp_mp1_state mp1_state) in sienna_cichlid_set_mp1_state() argument
4214 switch (mp1_state) { in sienna_cichlid_set_mp1_state()
4216 ret = smu_cmn_set_mp1_state(smu, mp1_state); in sienna_cichlid_set_mp1_state()
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