regBIFPLR3_0_LANE_5_EQUALIZATION_CNTL_16GT_BASE_IDX (reference) in projects: openbsd

Searched refs:regBIFPLR3_0_LANE_5_EQUALIZATION_CNTL_16GT_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/nbio/
H A D	nbio_7_7_0_offset.h	`13399 #define regBIFPLR3_0_LANE_5_EQUALIZATION_CNTL_16GT_BASE_IDX … macro`
H A D	nbio_7_2_0_offset.h	`15869 #define regBIFPLR3_0_LANE_5_EQUALIZATION_CNTL_16GT_BASE_IDX … macro`