regBIFPLR5_1_LANE_3_EQUALIZATION_CNTL_16GT (reference) in projects: openbsd

Searched refs:regBIFPLR5_1_LANE_3_EQUALIZATION_CNTL_16GT (Results 1 – 2 of 2) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/nbio/
H A D	nbio_7_7_0_offset.h	`23976 #define regBIFPLR5_1_LANE_3_EQUALIZATION_CNTL_16GT … macro`
H A D	nbio_7_2_0_offset.h	`24032 #define regBIFPLR5_1_LANE_3_EQUALIZATION_CNTL_16GT … macro`