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Searched refs:regCM0_CM_BLNDGAM_RAMB_START_SLOPE_CNTL_R_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_4_offset.h5043 #define regCM0_CM_BLNDGAM_RAMB_START_SLOPE_CNTL_R_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h3889 #define regCM0_CM_BLNDGAM_RAMB_START_SLOPE_CNTL_R_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h4130 #define regCM0_CM_BLNDGAM_RAMB_START_SLOPE_CNTL_R_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h4350 #define regCM0_CM_BLNDGAM_RAMB_START_SLOPE_CNTL_R_BASE_IDX … macro