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Searched refs:regCM2_CM_BLNDGAM_RAMA_START_SLOPE_CNTL_G (Results 1 – 4 of 4) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_4_offset.h6354 #define regCM2_CM_BLNDGAM_RAMA_START_SLOPE_CNTL_G … macro
H A Ddcn_3_1_5_offset.h5200 #define regCM2_CM_BLNDGAM_RAMA_START_SLOPE_CNTL_G … macro
H A Ddcn_3_1_2_offset.h5441 #define regCM2_CM_BLNDGAM_RAMA_START_SLOPE_CNTL_G … macro
H A Ddcn_3_1_6_offset.h5661 #define regCM2_CM_BLNDGAM_RAMA_START_SLOPE_CNTL_G … macro