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Searched refs:regCM3_CM_BLNDGAM_RAMA_START_SLOPE_CNTL_B (Results 1 – 4 of 4) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_4_offset.h7044 #define regCM3_CM_BLNDGAM_RAMA_START_SLOPE_CNTL_B … macro
H A Ddcn_3_1_5_offset.h5890 #define regCM3_CM_BLNDGAM_RAMA_START_SLOPE_CNTL_B … macro
H A Ddcn_3_1_2_offset.h6131 #define regCM3_CM_BLNDGAM_RAMA_START_SLOPE_CNTL_B … macro
H A Ddcn_3_1_6_offset.h6351 #define regCM3_CM_BLNDGAM_RAMA_START_SLOPE_CNTL_B … macro