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Searched refs:regCM3_CM_GAMCOR_RAMA_START_SLOPE_CNTL_G (Results 1 – 6 of 6) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_4_offset.h6898 #define regCM3_CM_GAMCOR_RAMA_START_SLOPE_CNTL_G … macro
H A Ddcn_3_1_5_offset.h5744 #define regCM3_CM_GAMCOR_RAMA_START_SLOPE_CNTL_G … macro
H A Ddcn_3_2_0_offset.h4593 #define regCM3_CM_GAMCOR_RAMA_START_SLOPE_CNTL_G … macro
H A Ddcn_3_2_1_offset.h4592 #define regCM3_CM_GAMCOR_RAMA_START_SLOPE_CNTL_G … macro
H A Ddcn_3_1_2_offset.h5985 #define regCM3_CM_GAMCOR_RAMA_START_SLOPE_CNTL_G … macro
H A Ddcn_3_1_6_offset.h6205 #define regCM3_CM_GAMCOR_RAMA_START_SLOPE_CNTL_G … macro