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Searched refs:regCM3_CM_GAMCOR_RAMA_START_SLOPE_CNTL_R (Results 1 – 6 of 6) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_4_offset.h6900 #define regCM3_CM_GAMCOR_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_3_1_5_offset.h5746 #define regCM3_CM_GAMCOR_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_3_2_0_offset.h4595 #define regCM3_CM_GAMCOR_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_3_2_1_offset.h4594 #define regCM3_CM_GAMCOR_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_3_1_2_offset.h5987 #define regCM3_CM_GAMCOR_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_3_1_6_offset.h6207 #define regCM3_CM_GAMCOR_RAMA_START_SLOPE_CNTL_R … macro