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Searched refs:regCNVC_CFG1_PRE_CSC_B_C21_C22 (Results 1 – 6 of 6) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_4_offset.h5338 #define regCNVC_CFG1_PRE_CSC_B_C21_C22 … macro
H A Ddcn_3_1_5_offset.h4184 #define regCNVC_CFG1_PRE_CSC_B_C21_C22 … macro
H A Ddcn_3_2_0_offset.h3645 #define regCNVC_CFG1_PRE_CSC_B_C21_C22 … macro
H A Ddcn_3_2_1_offset.h3644 #define regCNVC_CFG1_PRE_CSC_B_C21_C22 … macro
H A Ddcn_3_1_2_offset.h4425 #define regCNVC_CFG1_PRE_CSC_B_C21_C22 … macro
H A Ddcn_3_1_6_offset.h4645 #define regCNVC_CFG1_PRE_CSC_B_C21_C22 … macro