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Searched refs:regDWB_OGAM_RAMA_START_SLOPE_CNTL_R (Results 1 – 6 of 6) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_4_offset.h12234 #define regDWB_OGAM_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_3_1_5_offset.h900 #define regDWB_OGAM_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_3_2_0_offset.h808 #define regDWB_OGAM_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_3_2_1_offset.h808 #define regDWB_OGAM_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_3_1_2_offset.h1197 #define regDWB_OGAM_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_3_1_6_offset.h1401 #define regDWB_OGAM_RAMA_START_SLOPE_CNTL_R … macro