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Searched refs:regMPCC_OGAM1_MPCC_OGAM_RAMB_START_CNTL_B (Results 1 – 6 of 6) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_4_offset.h13604 #define regMPCC_OGAM1_MPCC_OGAM_RAMB_START_CNTL_B … macro
H A Ddcn_3_1_5_offset.h6692 #define regMPCC_OGAM1_MPCC_OGAM_RAMB_START_CNTL_B … macro
H A Ddcn_3_2_0_offset.h5219 #define regMPCC_OGAM1_MPCC_OGAM_RAMB_START_CNTL_B … macro
H A Ddcn_3_2_1_offset.h5218 #define regMPCC_OGAM1_MPCC_OGAM_RAMB_START_CNTL_B … macro
H A Ddcn_3_1_2_offset.h6933 #define regMPCC_OGAM1_MPCC_OGAM_RAMB_START_CNTL_B … macro
H A Ddcn_3_1_6_offset.h7153 #define regMPCC_OGAM1_MPCC_OGAM_RAMB_START_CNTL_B … macro