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Searched refs:regMPCC_OGAM2_MPCC_OGAM_RAMB_END_CNTL1_R (Results 1 – 6 of 6) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_4_offset.h13810 #define regMPCC_OGAM2_MPCC_OGAM_RAMB_END_CNTL1_R … macro
H A Ddcn_3_1_5_offset.h6898 #define regMPCC_OGAM2_MPCC_OGAM_RAMB_END_CNTL1_R … macro
H A Ddcn_3_2_0_offset.h5425 #define regMPCC_OGAM2_MPCC_OGAM_RAMB_END_CNTL1_R … macro
H A Ddcn_3_2_1_offset.h5424 #define regMPCC_OGAM2_MPCC_OGAM_RAMB_END_CNTL1_R … macro
H A Ddcn_3_1_2_offset.h7139 #define regMPCC_OGAM2_MPCC_OGAM_RAMB_END_CNTL1_R … macro
H A Ddcn_3_1_6_offset.h7359 #define regMPCC_OGAM2_MPCC_OGAM_RAMB_END_CNTL1_R … macro