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Searched refs:regOTG0_OTG_V_BLANK_START_END_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_4_offset.h7837 #define regOTG0_OTG_V_BLANK_START_END_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h8541 #define regOTG0_OTG_V_BLANK_START_END_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h7912 #define regOTG0_OTG_V_BLANK_START_END_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h7911 #define regOTG0_OTG_V_BLANK_START_END_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h8778 #define regOTG0_OTG_V_BLANK_START_END_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h9002 #define regOTG0_OTG_V_BLANK_START_END_BASE_IDX … macro