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Searched refs:regRLC_GPM_TIMER_INT_3 (Results 1 – 5 of 5) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_2_offset.h4916 #define regRLC_GPM_TIMER_INT_3 … macro
H A Dgc_9_4_3_offset.h6426 #define regRLC_GPM_TIMER_INT_3 … macro
H A Dgc_11_0_0_offset.h9806 #define regRLC_GPM_TIMER_INT_3 … macro
H A Dgc_11_0_3_offset.h10418 #define regRLC_GPM_TIMER_INT_3 … macro
/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dgfx_v9_4_3.c1242 WREG32_SOC15(GC, GET_INST(GC, i), regRLC_GPM_TIMER_INT_3, 0x9C4); in gfx_v9_4_3_rlc_start()