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Searched refs:regRLC_GPU_IOV_SDMA5_BUSY_STATUS (Results 1 – 4 of 4) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_2_offset.h3554 #define regRLC_GPU_IOV_SDMA5_BUSY_STATUS … macro
H A Dgc_9_4_3_offset.h7240 #define regRLC_GPU_IOV_SDMA5_BUSY_STATUS … macro
H A Dgc_11_0_0_offset.h10906 #define regRLC_GPU_IOV_SDMA5_BUSY_STATUS … macro
H A Dgc_11_0_3_offset.h10218 #define regRLC_GPU_IOV_SDMA5_BUSY_STATUS … macro