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Searched refs:regSPI_GDBG_WAVE_CNTL3 (Results 1 – 4 of 4) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_2_offset.h6012 #define regSPI_GDBG_WAVE_CNTL3 … macro
H A Dgc_9_4_3_offset.h3186 #define regSPI_GDBG_WAVE_CNTL3 … macro
H A Dgc_11_0_0_offset.h6354 #define regSPI_GDBG_WAVE_CNTL3 … macro
H A Dgc_11_0_3_offset.h6682 #define regSPI_GDBG_WAVE_CNTL3 … macro