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Searched refs:regSPI_WCL_PIPE_PERCENT_CS3 (Results 1 – 5 of 5) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_2_offset.h5996 #define regSPI_WCL_PIPE_PERCENT_CS3 … macro
H A Dgc_9_4_3_offset.h3170 #define regSPI_WCL_PIPE_PERCENT_CS3 … macro
H A Dgc_11_0_0_offset.h4572 #define regSPI_WCL_PIPE_PERCENT_CS3 … macro
H A Dgc_11_0_3_offset.h4796 #define regSPI_WCL_PIPE_PERCENT_CS3 … macro
/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dgfx_v9_4_3.c2981 wcl_cs_reg = SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regSPI_WCL_PIPE_PERCENT_CS3); in gfx_v9_4_3_emit_wave_limit_cs()