soffset (reference) in projects: openbsd

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Searched refs:soffset (Results 1 – 25 of 55) sorted by relevance

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/openbsd/sys/dev/pci/drm/
H A D	drm_suballoc.c	170 wasted = round_up(soffset, align) - soffset; in drm_suballoc_try_alloc() 173 soffset += wasted; in drm_suballoc_try_alloc() 176 sa->soffset = soffset; in drm_suballoc_try_alloc() 177 sa->eoffset = soffset + size; in drm_suballoc_try_alloc() 198 wasted = round_up(soffset, align) - soffset; in __drm_suballoc_event() 230 size_t soffset, best, tmp; in drm_suballoc_next_hole() local 265 tmp = sa->soffset; in drm_suballoc_next_hole() 266 if (tmp < soffset) { in drm_suballoc_next_hole() 270 tmp -= soffset; in drm_suballoc_next_hole() 432 unsigned long long soffset = i->soffset; in drm_suballoc_dump_debug_info() local [all …]
/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/
H A D	BUFInstructions.td	`145 bits<8> soffset; 181 "$vaddr, $srsrc,$format $soffset offen", 183 "$vaddr, $srsrc,$format $soffset idxen", 187 "$vaddr, $srsrc,$format $soffset addr64", 336 bits<8> soffset; 1453 SCSrc_b32:$soffset, offset:$offset); 1661 0, i32:$soffset, timm:$offset, 1675 i32:$voffset, i32:$soffset, timm:$offset, 1689 i32:$voffset, i32:$soffset, timm:$offset, 1735 (Instr_OFFSET $srsrc, $soffset, $offset) [all …]`
H A D	SMInstructions.td	`86 bits<8> soffset; 100 def SGPR_Offset : OffsetMode<0, 1, "_SGPR", (ins SReg_32:$soffset), "$soffset">; 103 "$soffset$offset">; 531 // soffset. 546 // soffset 548 soffset{6-0}, ?); 557 // The alternative GFX9 SGPR encoding using soffset to encode the 856 (smrd_load (SMRDSgpr i64:$sbase, i32:$soffset)), 857 (vt (!cast<SM_Pseudo>(Instr#"_SGPR") $sbase, $soffset, 0)) 893 (SIsbuffer_load v4i32:$sbase, i32:$soffset, timm:$cachepolicy), [all …]`
/openbsd/sys/dev/pci/drm/include/drm/
H A D	drm_suballoc.h	`46 size_t soffset; member 70 return sa->soffset; in drm_suballoc_soffset() 92 return sa->eoffset - sa->soffset; in drm_suballoc_size()`
/openbsd/sys/dev/pci/drm/radeon/
H A D	radeon_vm.c	449 uint64_t soffset, in radeon_vm_bo_set_addr() argument 458 if (soffset) { in radeon_vm_bo_set_addr() 460 eoffset = soffset + size - 1; in radeon_vm_bo_set_addr() 461 if (soffset >= eoffset) { in radeon_vm_bo_set_addr() 479 soffset /= RADEON_GPU_PAGE_SIZE; in radeon_vm_bo_set_addr() 481 if (soffset \|\| eoffset) { in radeon_vm_bo_set_addr() 490 soffset, tmp->bo, tmp->it.start, tmp->it.last); in radeon_vm_bo_set_addr() 520 if (soffset \|\| eoffset) { in radeon_vm_bo_set_addr() 522 bo_va->it.start = soffset; in radeon_vm_bo_set_addr() 531 soffset >>= radeon_vm_block_size; in radeon_vm_bo_set_addr() [all …]
H A D	radeon_trace.h	`69 __field(u64, soffset) 75 __entry->soffset = bo_va->it.start; 80 __entry->soffset, __entry->eoffset, __entry->flags)`
/openbsd/gnu/llvm/llvm/docs/AMDGPU/
H A D	AMDGPUAsmGFX90a.rst	434 … :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx9… 448 …be>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx9… 449 …be>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx9… 502 …d>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx9… 503 …0>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx9… 504 …4>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx9… 505 …1>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx9… 506 …7>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx9… 510 … :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx9… 511 … :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx9… [all …]
H A D	AMDGPUAsmGFX9.rst	524 … :ref:`srsrc<amdgpu_synid_gfx9_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx9… 537 …robe>`, :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx9… 538 …robe>`, :ref:`sbase<amdgpu_synid_gfx9_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx9… 591 …42d>`, :ref:`sbase<amdgpu_synid_gfx9_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx9… 592 …700>`, :ref:`sbase<amdgpu_synid_gfx9_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx9… 593 …cc4>`, :ref:`sbase<amdgpu_synid_gfx9_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx9… 594 …4b1>`, :ref:`sbase<amdgpu_synid_gfx9_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx9… 595 …c37>`, :ref:`sbase<amdgpu_synid_gfx9_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx9… 599 … :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx9… 600 … :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx9… [all …]
H A D	AMDGPUAsmGFX940.rst	430 …be>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx9… 431 …be>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx9… 484 …d>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx9… 485 …0>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx9… 486 …4>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx9… 487 …1>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx9… 488 …7>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx9… 492 … :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx9… 493 … :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx9… 498 …d>`, :ref:`sbase<amdgpu_synid_gfx940_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx9… [all …]
H A D	AMDGPUAsmGFX10.rst	1013 …obe>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx1… 1014 …obe>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx1… 1072 …c49>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx1… 1073 …a27>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx1… 1074 …d60>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx1… 1075 … :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx1… 1076 … :ref:`sbase<amdgpu_synid_gfx10_sbase_020892>`, :ref:`soffset<amdgpu_synid_gfx1… 1091 …c49>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b2d796>`, :ref:`soffset<amdgpu_synid_gfx1… 1092 …a27>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b2d796>`, :ref:`soffset<amdgpu_synid_gfx1… 1093 …d60>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_b2d796>`, :ref:`soffset<amdgpu_synid_gfx1… [all …]
H A D	AMDGPUAsmGFX7.rst	409 …fx7_vaddr_da1f09>`, :ref:`srsrc<amdgpu_synid_gfx7_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx7… 429 …dst_2a1d2e>`, :ref:`sbase<amdgpu_synid_gfx7_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx7… 430 …dst_313759>`, :ref:`sbase<amdgpu_synid_gfx7_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx7… 431 …dst_9172f3>`, :ref:`sbase<amdgpu_synid_gfx7_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx7… 432 …dst_0804b1>`, :ref:`sbase<amdgpu_synid_gfx7_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx7… 433 …dst_362c37>`, :ref:`sbase<amdgpu_synid_gfx7_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx7… 436 …dst_2a1d2e>`, :ref:`sbase<amdgpu_synid_gfx7_sbase_382fdf>`, :ref:`soffset<amdgpu_synid_gfx7… 437 …dst_313759>`, :ref:`sbase<amdgpu_synid_gfx7_sbase_382fdf>`, :ref:`soffset<amdgpu_synid_gfx7… 438 …dst_9172f3>`, :ref:`sbase<amdgpu_synid_gfx7_sbase_382fdf>`, :ref:`soffset<amdgpu_synid_gfx7… 439 …dst_0804b1>`, :ref:`sbase<amdgpu_synid_gfx7_sbase_382fdf>`, :ref:`soffset<amdgpu_synid_gfx7… [all …]
H A D	gfx8_soffset_32c2a9.rst	`10 soffset chapter`
H A D	gfx1030_soffset_fef808.rst	`10 soffset chapter`
H A D	gfx11_soffset_fef808.rst	`10 soffset chapter`
H A D	gfx10_soffset_b556e6.rst	`10 soffset chapter`
H A D	gfx7_soffset_48c95e.rst	`10 soffset chapter`
H A D	gfx8_soffset_b5af46.rst	`10 soffset chapter`
H A D	gfx908_soffset.rst	`10 soffset chapter`
H A D	gfx90a_soffset_4318ca.rst	`10 soffset chapter`
H A D	gfx940_soffset_4318ca.rst	`10 soffset chapter`
H A D	gfx9_soffset_4318ca.rst	`10 soffset chapter`
H A D	gfx8_soffset_abb420.rst	`10 soffset chapter`
H A D	AMDGPUAsmGFX8.rst	438 …_gfx8_probe>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_589eed>`, :ref:`soffset<amdgpu_synid_gfx8… 439 …_gfx8_probe>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx8… 440 …dst_78579b>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx8… 441 …dst_313759>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx8… 442 …dst_61db0e>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx8… 443 …dst_0804b1>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx8… 444 …dst_362c37>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_b0aa25>`, :ref:`soffset<amdgpu_synid_gfx8… 452 …dst_78579b>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_589eed>`, :ref:`soffset<amdgpu_synid_gfx8… 453 …dst_313759>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_589eed>`, :ref:`soffset<amdgpu_synid_gfx8… 454 …dst_61db0e>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_589eed>`, :ref:`soffset<amdgpu_synid_gfx8… [all …]
H A D	gfx1030_soffset_0f304c.rst	`10 soffset chapter`
H A D	gfx10_soffset_0f304c.rst	`10 soffset chapter`

12 3