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Searched refs:status_mask (Results 1 – 3 of 3) sorted by relevance

/openbsd/sys/dev/pci/drm/i915/display/
H A Dintel_display_irq.c183 u32 enable_mask = status_mask << 16; in i915_pipestat_enable_mask()
195 status_mask & PIPE_A_PSR_STATUS_VLV)) in i915_pipestat_enable_mask()
202 status_mask & PIPE_B_PSR_STATUS_VLV)) in i915_pipestat_enable_mask()
224 enum pipe pipe, u32 status_mask) in i915_enable_pipestat() argument
231 pipe_name(pipe), status_mask); in i915_enable_pipestat()
236 if ((dev_priv->pipestat_irq_mask[pipe] & status_mask) == status_mask) in i915_enable_pipestat()
247 enum pipe pipe, u32 status_mask) in i915_disable_pipestat() argument
254 pipe_name(pipe), status_mask); in i915_disable_pipestat()
425 u32 status_mask, enable_mask, iir_bit = 0; in i9xx_pipestat_irq_ack() local
436 status_mask = PIPE_FIFO_UNDERRUN_STATUS; in i9xx_pipestat_irq_ack()
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H A Dintel_display_irq.h69 void i915_enable_pipestat(struct drm_i915_private *i915, enum pipe pipe, u32 status_mask);
70 void i915_disable_pipestat(struct drm_i915_private *i915, enum pipe pipe, u32 status_mask);
/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dvi.c1059 u32 status_mask; in vi_set_vce_clocks() local
1065 status_mask = 0x00010000; in vi_set_vce_clocks()
1070 status_mask = CG_ECLK_STATUS__ECLK_STATUS_MASK; in vi_set_vce_clocks()
1081 if (RREG32_SMC(reg_status) & status_mask) in vi_set_vce_clocks()
1095 if (RREG32_SMC(reg_status) & status_mask) in vi_set_vce_clocks()