| /openbsd/gnu/gcc/gcc/config/rs6000/ |
| H A D | darwin-vecsave.asm | 53 stvx v21,r11,r0
81 lvx v21,r11,r0
111 stvx v21,r11,r0
142 lvx v21,r11,r0
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| H A D | darwin-world.asm | 135 stvx v21,r11,r12
224 lvx v21,r11,r12
|
| /openbsd/sys/arch/arm64/arm64/ |
| H A D | aesv8-armx.S | 418 aese v0.16b,v21.16b
456 aese v0.16b,v21.16b
581 aesd v0.16b,v21.16b
583 aesd v1.16b,v21.16b
715 aesd v0.16b,v21.16b
717 aesd v1.16b,v21.16b
777 aesd v1.16b,v21.16b
934 aese v0.16b,v21.16b
936 aese v1.16b,v21.16b
1062 aese v4.16b,v21.16b
[all …]
|
| /openbsd/regress/lib/libcrypto/x509/bettertls/certificates/ |
| H A D | 1721.key | 25 7q4oGBBVmBeiCPffnvjsqiKGylSnSSoyEfRQDeKlEmzkc2DNoPh6ZRhSWlpd/v21
|
| /openbsd/gnu/llvm/compiler-rt/lib/tsan/rtl/ |
| H A D | tsan_ppc_regs.h | 86 #define v21 21 macro
|
| H A D | tsan_rtl_ppc64.S | 107 stvx v21,0,r6
252 stvx v21,0,r6
|
| /openbsd/gnu/llvm/llvm/docs/AMDGPU/ |
| H A D | gfx1013_vaddr_c5ab43.rst | 28 …image_bvh64_intersect_ray v[39:42], [v50, v46, v23, v17, v16, v15, v21, v20, v19, v37, v40, v42], …
|
| H A D | gfx1030_vaddr_c5ab43.rst | 28 …image_bvh64_intersect_ray v[39:42], [v50, v46, v23, v17, v16, v15, v21, v20, v19, v37, v40, v42], …
|
| /openbsd/gnu/llvm/lldb/source/Utility/ |
| H A D | ARM64_DWARF_Registers.h | 102 v21, enumerator
|
| H A D | ARM64_ehframe_Registers.h | 101 v21, enumerator
|
| /openbsd/sys/dev/pci/drm/amd/amdgpu/ |
| H A D | amdgpu_atomfirmware.c | 213 struct atom_integrated_system_info_v2_1 v21; member
350 mem_channel_number = igp_info->v21.umachannelnumber; in amdgpu_atomfirmware_get_vram_info()
353 mem_type = igp_info->v21.memorytype; in amdgpu_atomfirmware_get_vram_info()
|
| /openbsd/gnu/llvm/lldb/source/Plugins/Process/Utility/ |
| H A D | RegisterContextFreeBSD_powerpc.cpp | 155 uint32_t v21[4]; member
|
| H A D | RegisterInfos_arm64.h | 634 DEFINE_VREG(v21),
668 DEFINE_FPU_PSEUDO(s21, 4, FPU_S_PSEUDO_REG_ENDIAN_OFFSET, v21),
701 DEFINE_FPU_PSEUDO(d21, 8, FPU_D_PSEUDO_REG_ENDIAN_OFFSET, v21),
|
| H A D | RegisterInfos_powerpc.h | 150 DEFINE_VMX(v21, LLDB_INVALID_REGNUM), \
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| H A D | RegisterInfos_arm64_sve.h | 430 DEFINE_VREG_SVE(v21, z21),
|
| H A D | RegisterContextDarwin_arm64.cpp | 816 case arm64_dwarf::v21: in ConvertRegisterKindToRegisterNumber()
|
| /openbsd/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonRegisterInfo.td | 242 def W10 : Rd<20, "v21:20", [V20, V21, VF10]>, DwarfRegNum<[119]>;
|
| /openbsd/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.td | 390 def D21 : AArch64Reg<21, "d21", [S21], ["v21", ""]>, DwarfRegAlias<B21>;
425 def Q21 : AArch64Reg<21, "q21", [D21], ["v21", ""]>, DwarfRegAlias<B21>;
|