| /openbsd/sys/dev/pci/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_optc.c | 68 int vupdate_width) in optc1_program_global_sync() argument
75 optc1->vupdate_width = vupdate_width; in optc1_program_global_sync()
87 VUPDATE_WIDTH, optc1->vupdate_width); in optc1_program_global_sync()
159 int vupdate_width, in optc1_program_timing() argument
179 optc1->vupdate_width = vupdate_width; in optc1_program_timing()
285 vupdate_width); in optc1_program_timing()
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| H A D | dcn10_optc.h | 588 int vupdate_width; member
638 int vupdate_width,
658 int vupdate_width);
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| H A D | dcn10_hubp.c | 131 if ((pipe_dest->vstartup_start - 2*(pipe_dest->vready_offset+pipe_dest->vupdate_width in hubp1_vready_workaround()
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| H A D | dcn10_hw_sequencer.c | 947 pipe_ctx->pipe_dlg_param.vupdate_width, in dcn10_enable_stream_timing()
2930 pipe_ctx->pipe_dlg_param.vupdate_width); in dcn10_program_pipe()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/inc/hw/ |
| H A D | timing_generator.h | 168 int vupdate_width,
255 int vupdate_width);
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| /openbsd/sys/dev/pci/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm_trace.h | 685 __field(int, vupdate_width)
703 __entry->vupdate_width = optc_state->vupdate_width;
724 __entry->vupdate_width,
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dml/dcn20/ |
| H A D | display_rq_dlg_calc_20v2.c | 865 unsigned int vupdate_width; in dml20v2_rq_dlg_get_dlg_params() local
1014 vupdate_width = dst->vupdate_width; in dml20v2_rq_dlg_get_dlg_params()
1040 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml20v2_rq_dlg_get_dlg_params()
1047 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml20v2_rq_dlg_get_dlg_params()
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| H A D | display_rq_dlg_calc_20.c | 865 unsigned int vupdate_width; in dml20_rq_dlg_get_dlg_params() local
1013 vupdate_width = dst->vupdate_width; in dml20_rq_dlg_get_dlg_params()
1039 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml20_rq_dlg_get_dlg_params()
1046 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml20_rq_dlg_get_dlg_params()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dce80/ |
| H A D | dce80_timing_generator.c | 113 int vupdate_width, in program_timing() argument
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dce110/ |
| H A D | dce110_timing_generator.h | 263 int vupdate_width,
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| H A D | dce110_timing_generator_v.c | 440 int vupdate_width, in dce110_timing_generator_v_program_timing() argument
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| H A D | dce110_timing_generator.c | 1957 int vupdate_width, in dce110_tg_program_timing() argument
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dce60/ |
| H A D | dce60_timing_generator.c | 113 int vupdate_width, in program_timing() argument
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dml/dcn30/ |
| H A D | display_rq_dlg_calc_30.c | 976 unsigned int vupdate_width = 0; in dml_rq_dlg_get_dlg_params() local
1113 vupdate_width = dst->vupdate_width; in dml_rq_dlg_get_dlg_params()
1139 - (double)(vready_offset + vupdate_width + vupdate_offset) / htotal in dml_rq_dlg_get_dlg_params()
1146 - (double)(vready_offset + vupdate_width + vupdate_offset) / htotal in dml_rq_dlg_get_dlg_params()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dml/dcn31/ |
| H A D | display_rq_dlg_calc_31.c | 914 unsigned int vupdate_width; in dml_rq_dlg_get_dlg_params() local
1030 vupdate_width = dst->vupdate_width; in dml_rq_dlg_get_dlg_params()
1035 …if (vstartup_start / 2.0 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal <= v… in dml_rq_dlg_get_dlg_params()
1040 …if (vstartup_start - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal <= vblank_… in dml_rq_dlg_get_dlg_params()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dml/dcn21/ |
| H A D | display_rq_dlg_calc_21.c | 911 unsigned int vupdate_width; in dml_rq_dlg_get_dlg_params() local
1053 vupdate_width = dst->vupdate_width; in dml_rq_dlg_get_dlg_params()
1079 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml_rq_dlg_get_dlg_params()
1086 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml_rq_dlg_get_dlg_params()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dml/ |
| H A D | dml1_display_rq_dlg_calc.c | 1062 unsigned int vupdate_width; in dml1_rq_dlg_get_dlg_params() local
1244 vupdate_width = e2e_pipe_param->pipe.dest.vupdate_width; in dml1_rq_dlg_get_dlg_params()
1314 line_setup = (double) (vupdate_offset + vupdate_width + vready_offset) / (double) htotal; in dml1_rq_dlg_get_dlg_params()
1336 DTRACE("DLG: %s: vupdate_width = %d", __func__, vupdate_width); in dml1_rq_dlg_get_dlg_params()
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| H A D | display_mode_lib.c | 235 dml_print("DML PARAMS: vupdate_width = %d\n", pipe_dest->vupdate_width); in dml_log_pipe_params()
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| H A D | display_mode_structs.h | 524 unsigned int vupdate_width; member
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| H A D | display_mode_vba.h | 140 dml_get_pipe_attr_decl(vupdate_width);
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dml/dcn314/ |
| H A D | display_rq_dlg_calc_314.c | 999 unsigned int vupdate_width; in dml_rq_dlg_get_dlg_params() local
1117 vupdate_width = dst->vupdate_width; in dml_rq_dlg_get_dlg_params()
1122 …if (vstartup_start / 2.0 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal <= v… in dml_rq_dlg_get_dlg_params()
1127 …if (vstartup_start - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal <= vblank_… in dml_rq_dlg_get_dlg_params()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dml/calcs/ |
| H A D | dcn_calcs.c | 448 input->dest.vupdate_width = pipe->pipe_dlg_param.vupdate_width; in pipe_ctx_to_e2e_pipe_params()
1209 pipe->pipe_dlg_param.vupdate_width = v->v_update_width_pix[input_idx]; in dcn_validate_bandwidth()
1250 hsplit_pipe->pipe_dlg_param.vupdate_width = v->v_update_width_pix[input_idx]; in dcn_validate_bandwidth()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_hwseq.c | 750 pipe_ctx->pipe_dlg_param.vupdate_width, in dcn20_enable_stream_timing()
1397 || old_pipe->pipe_dlg_param.vupdate_width != new_pipe->pipe_dlg_param.vupdate_width) in dcn20_detect_pipe_changes()
1711 pipe_ctx->pipe_dlg_param.vupdate_width); in dcn20_program_pipe()
2196 pipe_ctx->pipe_dlg_param.vupdate_width); in dcn20_update_bandwidth()
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| H A D | dcn20_hubp.c | 185 if ((pipe_dest->vstartup_start - (pipe_dest->vready_offset+pipe_dest->vupdate_width in hubp2_vready_at_or_After_vsync()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dce120/ |
| H A D | dce120_timing_generator.c | 699 int vupdate_width, in dce120_tg_program_timing() argument
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