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Searched refs:ARM_CP_CONST (Results 1 – 11 of 11) sorted by relevance

/qemu/target/arm/
H A Dcortex-regs.c40 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
43 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
46 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
49 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
52 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 },
55 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
58 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 },
61 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
64 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 },
67 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
[all …]
H A Ddebug_helper.c950 .type = ARM_CP_CONST | ARM_CP_NO_GDB, .resetvalue = 0 },
954 .type = ARM_CP_CONST, .resetvalue = 0 },
957 .type = ARM_CP_CONST | ARM_CP_NO_GDB, .resetvalue = 0 },
973 .type = ARM_CP_CONST, .resetvalue = 0 },
983 .type = ARM_CP_CONST, .resetvalue = 0 },
987 .type = ARM_CP_CONST, .resetvalue = 0 },
992 .type = ARM_CP_CONST, .resetvalue = 0 },
1002 .type = ARM_CP_CONST, .resetvalue = 0 },
1177 .type = ARM_CP_CONST, .resetvalue = cpu->isar.dbgdidr, in define_debug_regs()
1197 .type = ARM_CP_CONST, .resetvalue = cpu->isar.dbgdevid, in define_debug_regs()
[all …]
H A Dhelper.c67 if (ri->type & ARM_CP_CONST) { in read_raw_cp_reg()
87 if (ri->type & ARM_CP_CONST) { in write_raw_cp_reg()
112 if ((ri->type & ARM_CP_CONST) || in raw_accessors_invalid()
2271 .access = PL1_R, .type = ARM_CP_CONST,
8736 .type = ARM_CP_CONST, in register_cp_regs_for_features()
8868 .type = ARM_CP_CONST, in register_cp_regs_for_features()
9780 .type = ARM_CP_CONST, in register_cp_regs_for_features()
9784 .type = ARM_CP_CONST, in register_cp_regs_for_features()
9802 cbar.type = ARM_CP_CONST; in register_cp_regs_for_features()
10405 r->type = ARM_CP_CONST; in modify_arm_cp_regs_with_len()
[all …]
H A Dcpregs.h50 ARM_CP_CONST = 1 << 4, enumerator
/qemu/target/arm/tcg/
H A Dcpu64.c493 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0,
510 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0,
514 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0,
518 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0,
545 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0,
549 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0,
553 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0,
557 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0,
569 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0,
759 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0,
[all …]
H A Dcpu32.c310 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
312 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
370 .access = PL1_RW, .resetvalue = 0, .type = ARM_CP_CONST },
377 .access = PL1_RW, .resetvalue = 0, .type = ARM_CP_CONST },
379 .access = PL1_RW, .resetvalue = 0, .type = ARM_CP_CONST },
381 .access = PL1_RW, .resetvalue = 0, .type = ARM_CP_CONST },
550 .access = PL1_RW, .type = ARM_CP_CONST },
552 .access = PL1_RW, .type = ARM_CP_CONST },
619 .access = PL1_R, .type = ARM_CP_CONST, .resetvalue = 0 },
622 .access = PL1_R, .type = ARM_CP_CONST, .resetvalue = 0 },
[all …]
H A Dtranslate.c4698 if (ri->type & ARM_CP_CONST) { in do_coproc_insn()
4718 if (ri->type & ARM_CP_CONST) { in do_coproc_insn()
4740 if (ri->type & ARM_CP_CONST) { in do_coproc_insn()
H A Dtranslate-a64.c2426 if (ri->type & ARM_CP_CONST) { in handle_sys()
2437 if (ri->type & ARM_CP_CONST) { in handle_sys()
/qemu/hw/arm/
H A Dpxa2xx.c366 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
368 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
370 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
373 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
375 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
377 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
379 .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
/qemu/hw/intc/
H A Darm_gicv3_cpuif.c2578 .type = ARM_CP_NO_RAW | ARM_CP_CONST,
2606 .type = ARM_CP_NO_RAW | ARM_CP_CONST,
2622 .type = ARM_CP_NO_RAW | ARM_CP_CONST,
/qemu/target/arm/hvf/
H A Dhvf.c1188 if (ri->type & ARM_CP_CONST) { in hvf_sysreg_read_cp()