/qemu/target/arm/tcg/ |
H A D | cpu64.c | 70 set_feature(&cpu->env, ARM_FEATURE_EL3); in aarch64_a35_initfn() 239 set_feature(&cpu->env, ARM_FEATURE_EL3); in aarch64_a55_initfn() 308 set_feature(&cpu->env, ARM_FEATURE_EL3); in aarch64_a72_initfn() 364 set_feature(&cpu->env, ARM_FEATURE_EL3); in aarch64_a76_initfn() 433 set_feature(&cpu->env, ARM_FEATURE_EL3); in aarch64_a64fx_initfn() 483 if (el < 3 && arm_feature(env, ARM_FEATURE_EL3)) { in access_actlr_w() 604 set_feature(&cpu->env, ARM_FEATURE_EL3); in aarch64_neoverse_n1_initfn() 676 set_feature(&cpu->env, ARM_FEATURE_EL3); in aarch64_neoverse_v1_initfn() 899 set_feature(&cpu->env, ARM_FEATURE_EL3); in aarch64_a710_initfn() 997 set_feature(&cpu->env, ARM_FEATURE_EL3); in aarch64_neoverse_n2_initfn()
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H A D | cpu32.c | 257 set_feature(&cpu->env, ARM_FEATURE_EL3); in arm1176_initfn() 324 set_feature(&cpu->env, ARM_FEATURE_EL3); in cortex_a8_initfn() 392 set_feature(&cpu->env, ARM_FEATURE_EL3); in cortex_a9_initfn() 464 set_feature(&cpu->env, ARM_FEATURE_EL3); in cortex_a7_initfn() 513 set_feature(&cpu->env, ARM_FEATURE_EL3); in cortex_a15_initfn() 933 set_feature(&cpu->env, ARM_FEATURE_EL3); in arm_max_initfn()
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H A D | op_helper.c | 875 assert(arm_feature(env, ARM_FEATURE_EL3)); in HELPER() 1003 } else if (arm_feature(env, ARM_FEATURE_EL3)) { in HELPER() 1079 if (!arm_feature(env, ARM_FEATURE_EL3) && in HELPER() 1110 (smd || !arm_feature(env, ARM_FEATURE_EL3))) { in HELPER()
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H A D | hflags.c | 147 if (arm_feature(env, ARM_FEATURE_EL3)) { in sme_fa64()
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H A D | pauth_helper.c | 478 if (el < 3 && arm_feature(env, ARM_FEATURE_EL3)) { in pauth_check_trap()
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H A D | translate.c | 2791 if (!arm_dc_feature(s, ARM_FEATURE_EL3) || s->ns) { in msr_banked_access_decode()
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/qemu/target/arm/ |
H A D | cpu.c | 318 if (arm_feature(env, ARM_FEATURE_EL3)) { in arm_cpu_reset_hold() 361 !arm_feature(env, ARM_FEATURE_EL3)) { in arm_cpu_reset_hold() 578 bool have_el3 = arm_feature(env, ARM_FEATURE_EL3); in arm_emulate_firmware_reset() 1236 if (arm_feature(env, ARM_FEATURE_EL3) && el != 3) { in aarch64_cpu_dump_state() 1433 if (arm_feature(env, ARM_FEATURE_EL3) && in arm_cpu_dump_state() 1753 if (arm_feature(&cpu->env, ARM_FEATURE_EL3)) { in arm_cpu_post_init() 1879 if (arm_feature(&cpu->env, ARM_FEATURE_EL3)) { in arm_cpu_post_init() 2328 unset_feature(env, ARM_FEATURE_EL3); in arm_cpu_realizefn() 2509 if (arm_feature(env, ARM_FEATURE_EL3)) { in arm_cpu_realizefn()
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H A D | arm-powerctl.c | 140 if (((target_el == 3) && !arm_feature(&target_cpu->env, ARM_FEATURE_EL3)) || in arm_set_cpu_on()
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H A D | helper.c | 5985 if (arm_feature(env, ARM_FEATURE_EL3)) { in do_hcr_write() 6245 && arm_feature(env, ARM_FEATURE_EL3) in access_hxen() 7160 if (arm_feature(env, ARM_FEATURE_EL3) in sve_exception_el() 7209 if (arm_feature(env, ARM_FEATURE_EL3) in sme_exception_el() 7238 if (arm_feature(env, ARM_FEATURE_EL3)) { in sve_vqm1_for_el_sm() 7311 && arm_feature(env, ARM_FEATURE_EL3) in access_tpidr2() 7323 && arm_feature(env, ARM_FEATURE_EL3) in access_smprimap() 7334 && arm_feature(env, ARM_FEATURE_EL3) in access_smpri() 7773 arm_feature(env, ARM_FEATURE_EL3) && in access_pauth() 8146 arm_feature(env, ARM_FEATURE_EL3) && in access_mte() [all …]
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H A D | cpu64.c | 610 set_feature(&cpu->env, ARM_FEATURE_EL3); in aarch64_a57_initfn() 668 set_feature(&cpu->env, ARM_FEATURE_EL3); in aarch64_a53_initfn()
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H A D | cpu.h | 2376 ARM_FEATURE_EL3, /* has EL3 Secure monitor support */ enumerator 2453 if (arm_feature(env, ARM_FEATURE_EL3)) { in arm_is_el3_or_mon() 2562 if (arm_feature(env, ARM_FEATURE_EL3) && in arm_el_is_aa64() 2587 bool ret = (arm_feature(env, ARM_FEATURE_EL3) && in access_secure_reg() 2627 if (arm_feature(env, ARM_FEATURE_EL3)) { in arm_highest_el()
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H A D | gdbstub.c | 280 if (!arm_feature(env, ARM_FEATURE_EL3) && in arm_register_sysreg_for_feature()
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H A D | internals.h | 1337 && arm_feature(env, ARM_FEATURE_EL3) in allocation_tag_access_enabled() 1719 (!arm_feature(env, ARM_FEATURE_EL3) || (env->cp15.scr_el3 & SCR_FGTEN)); in arm_fgt_active()
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H A D | debug_helper.c | 36 } else if (arm_feature(env, ARM_FEATURE_EL3) && in arm_debug_target_el()
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/qemu/hw/intc/ |
H A D | arm_gicv3_cpuif.c | 1060 if (cs->hppi.grp == GICV3_G1 && !arm_feature(env, ARM_FEATURE_EL3)) { in gicv3_cpuif_update() 1113 if (arm_feature(env, ARM_FEATURE_EL3) && !arm_is_secure(env) && in icc_pmr_read() 1142 if (arm_feature(env, ARM_FEATURE_EL3) && !arm_is_secure(env) && in icc_pmr_write() 1682 && arm_feature(env, ARM_FEATURE_EL3) && !arm_is_secure(env)) { in icc_eoir_write() 1873 if (grp == GICV3_G1NS && regno < 2 && arm_feature(env, ARM_FEATURE_EL3)) { in icc_ap_write() 1979 if (arm_feature(env, ARM_FEATURE_EL3) && in icc_rpr_read() 1993 if (arm_feature(env, ARM_FEATURE_EL3) && !arm_is_secure(env)) { in icc_rpr_read() 2200 if (arm_feature(env, ARM_FEATURE_EL3) && in icc_ctlr_el1_write() 3175 assert(!arm_feature(&cpu->env, ARM_FEATURE_EL3)); in gicv3_init_cpuif()
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/qemu/hw/arm/ |
H A D | boot.c | 54 if (arm_feature(&cpu->env, ARM_FEATURE_EL3) && info->secure_boot) { in arm_boot_address_space() 744 if (arm_feature(env, ARM_FEATURE_EL3) && in do_cpu_reset() 1261 if (arm_feature(env, ARM_FEATURE_EL3)) { in arm_load_kernel()
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H A D | armv7m.c | 602 if (arm_feature(&cpu->env, ARM_FEATURE_EL3)) { in armv7m_load_kernel()
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