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Searched refs:CCCR (Results 1 – 1 of 1) sorted by relevance

/qemu/hw/arm/
H A Dpxa2xx.c177 #define CCCR 0x00 /* Core Clock Configuration register */ macro
188 case CCCR: in pxa2xx_cm_read()
194 return s->cm_regs[CCCR >> 2] | (3 << 28); in pxa2xx_cm_read()
211 case CCCR: in pxa2xx_cm_write()
284 if (!(s->cm_regs[CCCR >> 2] & (1U << 31))) { /* CPDIS */ in pxa2xx_pwrmode_write()
2176 s->cm_regs[CCCR >> 2] = 0x02000210; /* 416.0 MHz */ in pxa270_init()
2312 s->cm_regs[CCCR >> 2] = 0x00000121; /* from datasheet */ in pxa255_init()