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Searched refs:CP0MVPC0_M (Results 1 – 2 of 2) sorted by relevance

/qemu/target/mips/
H A Dcpu.h111 #define CP0MVPC0_M 31 macro
H A Dcpu-defs.c.inc1043 env->mvp->CP0_MVPConf0 = (1U << CP0MVPC0_M) | (1 << CP0MVPC0_TLBS) |