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Searched refs:CP0MVPC1_CIM (Results 1 – 2 of 2) sorted by relevance

/qemu/target/mips/
H A Dcpu.h120 #define CP0MVPC1_CIM 31 macro
H A Dcpu-defs.c.inc1057 env->mvp->CP0_MVPConf1 = (1U << CP0MVPC1_CIM) | (1 << CP0MVPC1_CIF) |