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Searched refs:CP0SC_C (Results 1 – 2 of 2) sorted by relevance

/qemu/target/mips/
H A Dcpu.c369 (2 << CP0SC_C); in mips_cpu_reset_hold()
372 (3 << CP0SC_C)) << 16; in mips_cpu_reset_hold()
375 (1 << CP0SC_EU) | (2 << CP0SC_C); in mips_cpu_reset_hold()
378 (1 << CP0SC_EU) | (2 << CP0SC_C)) << 16; in mips_cpu_reset_hold()
H A Dcpu.h650 #define CP0SC_C 0 macro
651 #define CP0SC_C_MASK (0x7ULL << CP0SC_C)