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Searched refs:CP0_PWBase (Results 1 – 5 of 5) sorted by relevance

/qemu/target/mips/sysemu/
H A Dmachine.c268 VMSTATE_UINTTL(env.CP0_PWBase, MIPSCPU),
/qemu/target/mips/
H A Dkvm.c789 &env->CP0_PWBase); in kvm_mips_put_cp0_registers()
1009 &env->CP0_PWBase); in kvm_mips_get_cp0_registers()
H A Dcpu.h663 target_ulong CP0_PWBase; member
/qemu/target/mips/tcg/sysemu/
H A Dtlb_helper.c738 uint64_t vaddr = env->CP0_PWBase; in page_table_walk_refill()
/qemu/target/mips/tcg/
H A Dtranslate.c5544 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_PWBase)); in gen_mfc0()
6274 gen_mtc0_store32(arg, offsetof(CPUMIPSState, CP0_PWBase)); in gen_mtc0()
7026 tcg_gen_ld_tl(arg, tcg_env, offsetof(CPUMIPSState, CP0_PWBase)); in gen_dmfc0()
7740 tcg_gen_st_tl(arg, tcg_env, offsetof(CPUMIPSState, CP0_PWBase)); in gen_dmtc0()