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Searched refs:CP0_REGISTER_05 (Results 1 – 2 of 2) sorted by relevance

/qemu/target/mips/
H A Dcpu.h251 #define CP0_REGISTER_05 5 macro
/qemu/target/mips/tcg/
H A Dtranslate.c5513 case CP0_REGISTER_05: in gen_mfc0()
6245 case CP0_REGISTER_05: in gen_mtc0()
6998 case CP0_REGISTER_05: in gen_dmfc0()
7712 case CP0_REGISTER_05: in gen_dmtc0()