Searched refs:CS (Results 1 – 15 of 15) sorted by relevance
/qemu/hw/ssi/ |
H A D | trace-events | 3 aspeed_smc_flash_set_segment(int cs, uint64_t reg, uint64_t start, uint64_t end) "CS%d segreg=0x%"P… 4 aspeed_smc_flash_read(int cs, uint64_t addr, uint32_t size, uint64_t data, int mode) "CS%d @0x%" P… 5 aspeed_smc_do_snoop(int cs, int index, int dummies, int data) "CS%d index:0x%x dummies:%d data:0x%x" 6 aspeed_smc_flash_write(int cs, uint64_t addr, uint32_t size, uint64_t data, int mode) "CS%d @0x%" … 11 aspeed_smc_flash_select(int cs, const char *prefix) "CS%d %sselect" 17 npcm7xx_fiu_select(const char *id, int cs) "%s select CS%d" 18 npcm7xx_fiu_deselect(const char *id, int cs) "%s deselect CS%d"
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H A D | xilinx_spips.c | 59 #define CS (0xF << 10) macro 291 int field = ~((s->regs[R_CONFIG] & CS) >> CS_SHIFT); in xilinx_spips_update_cs_lines()
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/qemu/docs/specs/ |
H A D | sev-guest-firmware.rst | 95 * CS segment base [31:16] 97 A hypervisor reads the CS segment base and IP value. The CS segment 98 base value represents the high order 16-bits of the CS segment base, so 99 the hypervisor must left shift the value of the CS segment base by 16 100 bits to form the full CS segment base for the CS segment register. It
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/qemu/target/i386/hvf/ |
H A D | x86_descr.c | 39 VMX_SEGMENT_FIELD(CS),
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/qemu/target/hexagon/ |
H A D | gen_tcg.h | 71 gen_helper_fcircadd(RxV, RxV, tcgv_siV, MuV, CS); \ 78 gen_helper_fcircadd(RxV, RxV, ireg, MuV, CS); \ 115 gen_helper_fcircadd(RxV, RxV, ireg, MuV, CS); \ 429 gen_helper_fcircadd(RxV, RxV, ireg, MuV, CS); \
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H A D | op_helper.c | 262 int32_t HELPER(fcircadd)(int32_t RxV, int32_t offset, int32_t M, int32_t CS) in HELPER() 271 start_addr = CS; in HELPER()
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H A D | macros.h | 465 gen_helper_fcircadd(REG, REG, tcgv_siV, MuV, CS); \
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/qemu/docs/devel/ |
H A D | tcg.rst | 37 Program Counter (PC) and other CPU state information (such as the CS
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/qemu/include/block/ |
H A D | ufs.h | 66 FIELD(CAP, CS, 28, 1)
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/qemu/target/hexagon/imported/ |
H A D | macros.def | 381 fREAD_CSREG, /* read CS register */
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/qemu/fpu/ |
H A D | softfloat-specialize.c.inc | 30 is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
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/qemu/hw/ufs/ |
H A D | ufs.c | 1612 cap = FIELD_DP32(cap, CAP, CS, 0); in ufs_init_hc()
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/qemu/target/s390x/tcg/ |
H A D | insn-data.h.inc | 273 D(0xba00, CS, RS_a, Z, r3_32u, r1_32u, new, r1_32, cs, 0, MO_TEUL)
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/qemu/target/i386/tcg/ |
H A D | decode-new.c.inc | 1510 [0x0E] = X86_OP_ENTRYr(PUSH, CS, w, chk(i64)),
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/qemu/tests/tcg/i386/ |
H A D | x86.csv | 1683 "PUSH CS","PUSHW/PUSHL/PUSHQ CS","pushw/pushl/pushq CS","0E","V","N.S.","","","r","Y",""
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