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Searched refs:CSR_TDATA1 (Results 1 – 2 of 2) sorted by relevance

/qemu/target/riscv/
H A Dcpu_bits.h352 #define CSR_TDATA1 0x7a1 macro
H A Dcsr.c3915 if (env->trigger_cur >= RV_MAX_TRIGGERS && csrno == CSR_TDATA1) { in read_tdata()
3920 if (!tdata_available(env, csrno - CSR_TDATA1)) { in read_tdata()
3924 *val = tdata_csr_read(env, csrno - CSR_TDATA1); in read_tdata()
3931 if (!tdata_available(env, csrno - CSR_TDATA1)) { in write_tdata()
3935 tdata_csr_write(env, csrno - CSR_TDATA1, val); in write_tdata()
4876 [CSR_TDATA1] = { "tdata1", debug, read_tdata, write_tdata },