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Searched refs:CXL_CACHE_LINE_SIZE (Results 1 – 3 of 3) sorted by relevance

/qemu/include/hw/cxl/
H A Dcxl.h21 #define CXL_CACHE_LINE_SIZE 64 macro
/qemu/hw/cxl/
H A Dcxl-mailbox-utils.c1069 query_length = ldq_le_p(&in->length) * CXL_CACHE_LINE_SIZE; in cmd_media_get_poison_list()
1097 stl_le_p(&out->records[i].length, (stop - start) / CXL_CACHE_LINE_SIZE); in cmd_media_get_poison_list()
1129 dpa + CXL_CACHE_LINE_SIZE <= ent->start + ent->length) { in cmd_media_inject_poison()
1139 p->length = CXL_CACHE_LINE_SIZE; in cmd_media_inject_poison()
1175 if (dpa + CXL_CACHE_LINE_SIZE > cxl_dstate->mem_size) { in cmd_media_clear_poison()
1216 if (dpa + CXL_CACHE_LINE_SIZE < ent->start + ent->length) { in cmd_media_clear_poison()
1224 frag->start = dpa + CXL_CACHE_LINE_SIZE; in cmd_media_clear_poison()
/qemu/hw/mem/
H A Dcxl_type3.c1013 if (dpa_offset + CXL_CACHE_LINE_SIZE > ct3d->cxl_dstate.mem_size) { in set_cacheline()
1029 CXL_CACHE_LINE_SIZE); in set_cacheline()