Searched refs:CXL_COMPONENT_REG_BAR_IDX (Results 1 – 5 of 5) sorted by relevance
/qemu/include/hw/cxl/ |
H A D | cxl.h | 22 #define CXL_COMPONENT_REG_BAR_IDX 0 macro
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/qemu/hw/pci-bridge/ |
H A D | cxl_downstream.c | 127 .reg0_base_lo = RBI_COMPONENT_REG | CXL_COMPONENT_REG_BAR_IDX, in build_dvsecs() 185 pci_register_bar(d, CXL_COMPONENT_REG_BAR_IDX, in cxl_dsp_realize()
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H A D | cxl_root_port.c | 138 .reg0_base_lo = RBI_COMPONENT_REG | CXL_COMPONENT_REG_BAR_IDX, in build_dvsecs() 183 pci_register_bar(pci_dev, CXL_COMPONENT_REG_BAR_IDX, in cxl_rp_realize()
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H A D | cxl_upstream.c | 130 .reg0_base_lo = RBI_COMPONENT_REG | CXL_COMPONENT_REG_BAR_IDX, in build_dvsecs() 330 pci_register_bar(d, CXL_COMPONENT_REG_BAR_IDX, in cxl_usp_realize()
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/qemu/hw/mem/ |
H A D | cxl_type3.c | 326 .reg0_base_lo = RBI_COMPONENT_REG | CXL_COMPONENT_REG_BAR_IDX, in build_dvsecs() 683 pci_dev, CXL_COMPONENT_REG_BAR_IDX, in ct3_realize()
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