Searched refs:DATA_CHANNEL_1_AND_0 (Results 1 – 1 of 1) sorted by relevance
48 #define DATA_CHANNEL_1_AND_0 TO_REG(0x10) macro71 assert(reg >= DATA_CHANNEL_1_AND_0 && in breaks_threshold()72 reg < DATA_CHANNEL_1_AND_0 + s->nr_channels / 2); in breaks_threshold()74 int a_bounds_reg = BOUNDS_CHANNEL_0 + (reg - DATA_CHANNEL_1_AND_0) * 2; in breaks_threshold()92 assert(reg >= DATA_CHANNEL_1_AND_0 && in read_channel_sample()93 reg < DATA_CHANNEL_1_AND_0 + s->nr_channels / 2); in read_channel_sample()100 s->regs[INTERRUPT_CONTROL] |= BIT(reg - DATA_CHANNEL_1_AND_0); in read_channel_sample()145 __func__, s->engine_id, reg - DATA_CHANNEL_1_AND_0); in aspeed_adc_engine_read()149 case DATA_CHANNEL_1_AND_0 ... DATA_CHANNEL_7_AND_6: in aspeed_adc_engine_read()194 __func__, s->engine_id, reg - DATA_CHANNEL_1_AND_0); in aspeed_adc_engine_write()[all …]