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Searched refs:E1000_RXD_STAT_DD (Results 1 – 6 of 6) sorted by relevance

/qemu/tests/qtest/
H A De1000e-test.c123 E1000_RXD_STAT_DD, ==, E1000_RXD_STAT_DD); in e1000e_receive_verify()
H A Digb-test.c126 E1000_RXD_STAT_DD, ==, E1000_RXD_STAT_DD); in igb_receive_verify()
/qemu/hw/net/
H A De1000e_core.c1134 *status_flags = E1000_RXD_STAT_DD; in e1000e_build_rx_metadata()
1336 d->status &= ~E1000_RXD_STAT_DD; in e1000e_pci_dma_write_rx_desc()
1339 if (status & E1000_RXD_STAT_DD) { in e1000e_pci_dma_write_rx_desc()
1350 d->wb.middle.status_error &= ~E1000_RXD_STAT_DD; in e1000e_pci_dma_write_rx_desc()
1353 if (status & E1000_RXD_STAT_DD) { in e1000e_pci_dma_write_rx_desc()
1363 d->wb.upper.status_error &= ~E1000_RXD_STAT_DD; in e1000e_pci_dma_write_rx_desc()
1366 if (status & E1000_RXD_STAT_DD) { in e1000e_pci_dma_write_rx_desc()
H A De1000x_regs.h838 #define E1000_RXD_STAT_DD 0x01 /* Descriptor Done */ macro
H A Digb_core.c1354 *status_flags = E1000_RXD_STAT_DD; in igb_build_rx_metadata_common()
1602 d->status &= ~E1000_RXD_STAT_DD; in igb_pci_dma_write_rx_desc()
1605 if (status & E1000_RXD_STAT_DD) { in igb_pci_dma_write_rx_desc()
1615 d->wb.upper.status_error &= ~E1000_RXD_STAT_DD; in igb_pci_dma_write_rx_desc()
1618 if (status & E1000_RXD_STAT_DD) { in igb_pci_dma_write_rx_desc()
H A De1000.c950 desc.status &= ~E1000_RXD_STAT_DD; in e1000_receive_iov()
984 desc.status |= (vlan_status | E1000_RXD_STAT_DD); in e1000_receive_iov()