Searched refs:ERET (Results 1 – 7 of 7) sorted by relevance
| /qemu/target/arm/tcg/ |
| H A D | t32.decode | 411 # every other encoding of SUBS. With v7VE, IMM=0 is redefined as ERET.
413 ERET 1111 0011 1101 1110 1000 1111 0000 0000
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| H A D | hflags.c | 328 if (FIELD_EX64(env->cp15.fgt_exec[FGTREG_HFGITR], HFGITR_EL2, ERET)) { in rebuild_hflags_a64()
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| H A D | a32.decode | 241 ERET ---- 0001 0110 0000 0000 0000 0110 1110
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| H A D | a64.decode | 194 ERET 1101011 0100 11111 000000 11111 00000
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| /qemu/target/arm/ |
| H A D | cpregs.h | 497 FIELD(HFGITR_EL2, ERET, 51, 1)
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| /qemu/target/mips/tcg/ |
| H A D | micromips_translate.c.inc | 297 ERET = 0xf,
1257 case ERET:
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| /qemu/disas/ |
| H A D | nanomips.c | 6795 static char *ERET(uint64 instruction, Dis_info *info) in ERET() function
18234 0xfc01ffff, 0x2000f37f, &ERET , 0,
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