Searched refs:FCR0_REV (Results 1 – 2 of 2) sorted by relevance
/qemu/target/mips/ |
H A D | cpu-defs.c.inc | 499 (1 << FCR0_S) | (0x00 << FCR0_PRID) | (0x0 << FCR0_REV), 539 (1 << FCR0_S) | (0x02 << FCR0_PRID) | (0x0 << FCR0_REV), 562 .CP1_fcr0 = (0x5 << FCR0_PRID) | (0x0 << FCR0_REV), 583 .CP1_fcr0 = (0x54 << FCR0_PRID) | (0x0 << FCR0_REV), 630 (0x81 << FCR0_PRID) | (0x0 << FCR0_REV), 659 (0x82 << FCR0_PRID) | (0x0 << FCR0_REV), 688 (1 << FCR0_S) | (0x00 << FCR0_PRID) | (0x0 << FCR0_REV), 735 (0x89 << FCR0_PRID) | (0x0 << FCR0_REV), 772 (1 << FCR0_S) | (0x03 << FCR0_PRID) | (0x0 << FCR0_REV), 833 .CP1_fcr0 = (0x5 << FCR0_PRID) | (0x1 << FCR0_REV), [all …]
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H A D | cpu.h | 63 #define FCR0_REV 0 macro
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