Searched refs:L1CSR0_DCE (Results 1 – 2 of 2) sorted by relevance
2279 #define L1CSR0_DCE 0x00000001 /* Data Cache Enable */ macro
1136 tcg_gen_andi_tl(t0, cpu_gpr[gprn], L1CSR0_DCE | L1CSR0_CPE); in spr_write_e500_l1csr0()