Searched refs:PCI_ERR_SIZEOF (Results 1 – 12 of 12) sorted by relevance
| /qemu/hw/pci-bridge/ |
| H A D | cxl_downstream.c | 32 (CXL_DOWNSTREAM_PORT_AER_OFFSET + PCI_ERR_SIZEOF)
176 PCI_ERR_SIZEOF, errp); in cxl_dsp_realize()
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| H A D | cxl_upstream.c | 30 (CXL_UPSTREAM_PORT_AER_OFFSET + PCI_ERR_SIZEOF)
319 PCI_ERR_SIZEOF, errp); in cxl_usp_realize()
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| H A D | xio3130_upstream.c | 90 PCI_ERR_SIZEOF, errp); in xio3130_upstream_realize()
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| H A D | gen_pcie_root_port.c | 28 (GEN_PCIE_ROOT_PORT_AER_OFFSET + PCI_ERR_SIZEOF)
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| H A D | pcie_pci_bridge.c | 65 rc = pcie_aer_init(d, PCI_ERR_VER, 0x100, PCI_ERR_SIZEOF, errp); in OBJECT_DECLARE_SIMPLE_TYPE()
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| H A D | xio3130_downstream.c | 109 PCI_ERR_SIZEOF, errp); in xio3130_downstream_realize()
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| H A D | pcie_root_port.c | 113 PCI_ERR_SIZEOF, errp); in rp_realize()
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| H A D | cxl_root_port.c | 40 (GEN_PCIE_ROOT_PORT_AER_OFFSET + PCI_ERR_SIZEOF)
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| /qemu/include/hw/pci/ |
| H A D | pcie_regs.h | 91 #define PCI_ERR_SIZEOF 0x48 macro
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| /qemu/hw/net/ |
| H A D | e1000e.c | 480 PCI_ERR_SIZEOF, NULL) < 0) { in e1000e_pci_realize()
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| /qemu/hw/virtio/ |
| H A D | virtio-pci.c | 2219 PCI_ERR_SIZEOF, NULL); in virtio_pci_realize()
2220 last_pcie_cap_offset += PCI_ERR_SIZEOF; in virtio_pci_realize()
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| /qemu/hw/mem/ |
| H A D | cxl_type3.c | 714 rc = pcie_aer_init(pci_dev, PCI_ERR_VER, 0x200, PCI_ERR_SIZEOF, NULL); in ct3_realize()
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