Searched refs:PSW_MASK_32 (Results 1 – 8 of 8) sorted by relevance
121 PSW_MASK_64 | PSW_MASK_32)222 env->psw.mask = PSW_MASK_64 | PSW_MASK_32 | PSW_ASC_PRIMARY in setup_frame()288 env->psw.mask = PSW_MASK_64 | PSW_MASK_32 | PSW_ASC_PRIMARY in setup_rt_frame()327 mask |= PSW_MASK_32; in restore_sigregs()
53 switch (mask & (PSW_MASK_32 | PSW_MASK_64)) { in is_early_exception_psw()56 case PSW_MASK_32: in is_early_exception_psw()58 case PSW_MASK_32 | PSW_MASK_64: in is_early_exception_psw()
300 #undef PSW_MASK_32322 #define PSW_MASK_32 0x0000000080000000ULL macro358 QEMU_BUILD_BUG_ON(FLAG_MASK_32 != PSW_MASK_32 >> FLAG_MASK_PSW_SHIFT);
125 ((env->psw.mask & PSW_MASK_32) ? (1 << 5) : 0) | in get_per_atmid()134 if (!(env->psw.mask & PSW_MASK_32)) { in wrap_address()
178 message_reg_len = (env->psw.mask & PSW_MASK_32) ? 32 : 24; in cpacf_sha512()256 buf_reg_len = (env->psw.mask & PSW_MASK_32) ? 32 : 24; in fill_buf_random()
714 if (!(env->psw.mask & PSW_MASK_32)) { in set_address_zero()729 if (!(env->psw.mask & PSW_MASK_32)) { in set_address()
48 #define IPL_PSW_MASK (PSW_MASK_32 | PSW_MASK_64)
1802 PSW_MASK_32; in init_thread()