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Searched refs:PVR5_DCACHE_WRITEBACK_MASK (Results 1 – 2 of 2) sorted by relevance

/qemu/target/microblaze/
H A Dcpu.h187 #define PVR5_DCACHE_WRITEBACK_MASK 0x00004000 macro
H A Dcpu.c294 cpu->cfg.dcache_writeback ? PVR5_DCACHE_WRITEBACK_MASK : 0; in mb_cpu_realizefn()