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Searched refs:REG_MISTA (Results 1 – 3 of 3) sorted by relevance

/qemu/hw/net/
H A Dnpcm7xx_emc.c161 if (emc->regs[REG_MISTA] & emc->regs[REG_MIEN] & mask) { in emc_update_mista_txintr()
162 emc->regs[REG_MISTA] |= REG_MISTA_TXINTR; in emc_update_mista_txintr()
164 emc->regs[REG_MISTA] &= ~REG_MISTA_TXINTR; in emc_update_mista_txintr()
175 if (emc->regs[REG_MISTA] & emc->regs[REG_MIEN] & mask) { in emc_update_mista_rxintr()
176 emc->regs[REG_MISTA] |= REG_MISTA_RXINTR; in emc_update_mista_rxintr()
178 emc->regs[REG_MISTA] &= ~REG_MISTA_RXINTR; in emc_update_mista_rxintr()
185 int level = !!(emc->regs[REG_MISTA] & in emc_update_tx_irq()
195 int level = !!(emc->regs[REG_MISTA] & in emc_update_rx_irq()
279 emc->regs[REG_MISTA] |= flags; in emc_set_mista()
406 if (emc->regs[REG_MISTA] & emc->regs[REG_MIEN] & REG_MISTA_TXINTR) { in emc_try_send_next_packet()
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/qemu/tests/qtest/
H A Dnpcm7xx_emc-test.c70 REG_MISTA, enumerator
363 CHECK_REG(REG_MISTA, 0); in test_init()
413 uint32_t mista = emc_read(qts, mod, REG_MISTA); in emc_wait_mista()
572 got_tdu = !!(emc_read(qts, mod, REG_MISTA) & REG_MISTA_TDU); in emc_send_verify()
575 emc_write(qts, mod, REG_MISTA, in emc_send_verify()
576 emc_read(qts, mod, REG_MISTA) & 0xffff0000); in emc_send_verify()
582 g_assert_cmphex(emc_read(qts, mod, REG_MISTA), ==, in emc_send_verify()
704 g_assert_cmphex((emc_read(qts, mod, REG_MISTA) & expected_mask), in emc_recv_verify()
/qemu/include/hw/net/
H A Dnpcm7xx_emc.h47 REG_MISTA, enumerator