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Searched refs:REG_PLL_DDR1_CTRL (Results 1 – 1 of 1) sorted by relevance

/qemu/hw/misc/
H A Dallwinner-r40-ccu.c42 REG_PLL_DDR1_CTRL = 0x004c, enumerator
93 case REG_PLL_DDR1_CTRL: /* DDR1 Control register */ in allwinner_r40_ccu_write()
159 s->regs[REG_INDEX(REG_PLL_DDR1_CTRL)] = 0x00001800; in allwinner_r40_ccu_reset()